The application of bias-stresses with high source drain voltage and different gate voltages in polycrystalline thin-film transistors modifies the transconductance as well as the off current. These effects have been explained in terms of hot-holes injection into the gate insulator causing the formation of trap centers in the oxide and interface states near the drain. © 1994 IEEE.
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering
Fortunato, G., Pecora, A., & Tallarida, G. (1994). Hot Carrier Effects in n-Channel Polycrystalline Silicon Thin-Film Transistors: A Correlation Between Off-Current and Transconductance Variations. IEEE Transactions on Electron Devices, 41(3), 340 - 346. https://doi.org/10.1109/16.275218